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AMD Mobile Serial VID Dual-Phase
Fixed-Frequency Controller
During downward VID transitions, the controller tem-
porarily sets the OVP threshold to 1.85V (typ), preventing
false OVP faults. Once the error amplifier detects that the
output voltage is in regulation, the OVP threshold tracks
the selected VID DAC code. The MAX17009 automati-
cally uses forced-PWM operation during soft-shutdown.
When configured for separate-mode operation, both
SMPSs remain in pulse-skipping mode, regardless of
the PSI_L bit state.
When configured for combined-mode operation, the
PSI_L bit sets the MAX17009 in 1-phase pulse-skipping
mode or 2-phase pulse-skipping mode.
Idle Mode Current-Sense Threshold
The Idle Mode current-sense threshold forces a lightly
loaded regulator to source a minimum amount of power
with each on-time since the controller cannot terminate
the on-time until the current-sense voltage exceeds the
Idle Mode current-sense threshold (V IDLE = 0.15 x
V LIMIT ). Since the zero-crossing comparator prevents
the switching regulator from sinking current, the con-
troller must skip pulses to avoid overcharging the out-
put. When the clock edge occurs, if the output voltage
still exceeds the feedback threshold, the controller
does not initiate another on-time. This forces the con-
troller to actually regulate the valley of the output volt-
age ripple under light-load conditions.
inductor value. Generally, low inductor values produce
a broader efficiency vs. load curve, while higher values
result in higher full-load efficiency (assuming that the
coil resistance remains fixed) and less output-voltage
ripple. Penalties for using higher inductor values
include larger physical size and degraded load-tran-
sient response (especially at low input-voltage levels).
Current Sense
The output current of each phase is sensed differentially.
A low offset voltage and high gain (10V/V) differential
current amplifier at each phase allows low-resistance
current-sense resistors to be used to minimize power
dissipation. Sensing the current at the output of each
phase offers advantages, including less noise sensitivi-
ty, more accurate current sharing between phases, and
the flexibility of using either a current-sense resistor or
the DC resistance of the output inductor.
Using the DC resistance (R DCR ) of the output inductor
allows higher efficiency. In this configuration, the initial
tolerance and temperature coefficient of the inductor’s
DCR must be accounted for in the output-voltage
droop-error budget and power monitor. This current-
sense method uses an RC filtering network to extract
the current information from the output inductor (see
Figure 5). The time constant of the RC network should
match the inductor’s time constant (L/R DCR ):
Automatic Pulse-Skipping Crossover
In skip mode, the MAX17009 zero-crossing compara-
L
R DCR
= R EQ C SENSE
V OUT ( V IN ? V OUT )
tors are active. Therefore, an inherent automatic
switchover to PFM takes place at light loads, resulting
in a highly efficient operating mode. This switchover is
affected by a comparator that truncates the low-side
switch on-time at the inductor current’s zero crossing.
The driver ’s zero-crossing comparator senses the
inductor current across the low-side MOSFET. Once
V GND - V LX drops below the zero-crossing threshold,
the driver forces DL low. This mechanism causes the
threshold between pulse-skipping PFM and nonskip-
ping PWM operation to coincide with the boundary
between continuous and discontinuous inductor-cur-
rent operation (also known as the “critical-conduction”
point). The load-current level at which the PFM/PWM
crossover occurs, I LOAD(SKIP) , is given by:
I LOAD ( SKIP ) =
2 V IN f SW L
The switching waveforms may appear noisy and asyn-
chronous when light loading causes pulse-skipping
operation, but this is a normal operating condition that
results in high light-load efficiency. Trade-offs in PFM
noise vs. light-load efficiency are made by varying the
where C SENSE and R EQ are the time-constant matching
components. To minimize the current-sense error due
to the current-sense inputs ’ bias current (I CSP and
I CSN ), choose R EQ less than 2k Ω and use the above
equation to determine the sense capacitance
(C SENSE ). Choose capacitors with 5% tolerance and
resistors with 1% tolerance specifications. Temperature
compensation is recommended for this current-sense
method. See the Voltage-Positioning and Loop
Compensation section for detailed information.
When using a current-sense resistor for accurate output-
voltage positioning, the circuit requires a differential RC
filter to eliminate the AC voltage step caused by the
equivalent series inductance (L ESL ) of the current-sense
resistor (see Figure 5). The ESL-induced voltage step
does not affect the average current-sense voltage, but
results in a significant peak current-sense voltage error
that results in unwanted offsets in the regulation voltage
and results in early current-limit detection. Similar to the
inductor DCR sensing method above, the RC filter’s time
constant should match the L/R time constant formed by
the current-sense resistor’s parasitic inductance:
28
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